MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 164

• Manufacturer Part Number: MC56F8257MLH
• Description: DSC 64K FLASH 60MHZ 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8257MLH

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 54
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Memory Map and Registers
Addresses: TMRA0_FILT – F000h base + Bh offset = F00Bh
164
Reset
Read
Write
FILT_CNT
FILT_PER
Bit
Reserved
15–11
10–8
Field
7–0
15
0
TMRA1_FILT – F010h base + Bh offset = F01Bh
TMRA2_FILT – F020h base + Bh offset = F02Bh
TMRA3_FILT – F030h base + Bh offset = F03Bh
TMRB0_FILT – F040h base + Bh offset = F04Bh
TMRB1_FILT – F050h base + Bh offset = F05Bh
TMRB2_FILT – F060h base + Bh offset = F06Bh
TMRB3_FILT – F070h base + Bh offset = F07Bh
14
0
This read-only bitfield is reserved and always has the value zero.
Input Filter Sample Count
These bits represent the number of consecutive samples that must agree prior to the input filter accepting
an input transition. A value of 0x0 represents 3 samples. A value of 0x7 represents 10 samples. The value
of FILT_CNT affects the input latency.
Input Filter Sample Period
These bits represent the sampling period (in IP bus clock cycles) of the TMR input signals. Each input is
sampled multiple times at the rate specified by this field. If FILT_PER is 0x00 (default), then the input filter
is bypassed. The value of FILT_PER affects the input latency.
When changing values for FILT_PER from one non-zero value to another non-zero value, write a value of
zero first to clear the filter.
13
0
0
12
0
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
11
0
TMRx_FILT field descriptions
10
0
FILT_CNT
0
9
Preliminary
0
8
Description
0
7
0
6
0
5
FILT_PER
0
4
0
3
Freescale Semiconductor
0
2
0
1
0
0