TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 215

• Manufacturer Part Number: TMPM330FWFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
• Manufacturer: Toshiba

Specifications of TMPM330FWFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 128K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

11.3.19 Configurations of Transmit/Receive Buffer
11.3.20 Software reset
Software reset is generated by writing the bits 1 and 0 of SC0MOD2 <SWRST1:0> as “10”
followed by “01”. As a result, SC0MOD0<RXE>, SC0MOD1<TXE>,
SC0MOD2<TBEMP>,<RBFLL>,<TXRUN> of mode registers and SC0CR<OERR>, <PERR>,
<FERR> of control registers and internal circuit is initialized. Other states are maintained.
(SCLK output)
(SCLK input)
I/O Interface
I/O Interface
UART
Transmit buffer
Transmit buffer
Transmit buffer
Receive buffer
Receive buffer
Receive buffer
Under development
Page203
<WBUF> = 0
Double
Double
Single
Single
Single
Single
<WBUF> = 1
Double
Double
Double
Double
Double
Double
TMPM330