TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 220

• Manufacturer Part Number: TMPM330FWFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
• Manufacturer: Toshiba

Specifications of TMPM330FWFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 128K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

11 Serial Channel (SIO)
11.4.5
SC0MOD1
<I2S0>:
<FDPX1:0>:
<TXE>:
<SINT2:0>:
(Note)
Mode control register 1
bit Symbol
Read/Write
After reset
Specify the mode first and then specify the <TXE> bit.
Function
This bit enables transmission and is valid for all the transfer modes (
Specifies the interval time of continuous transmission when double buffering or FIFO is
enabled in the I/O interface mode. This parameter is valid only for the I/O interface
mode when SCLK0 pin input is not selected.
Specifies the IDLE mode operation.
Configures the transfer mode in the I/O interface mode. Also configures the FIFO if it is
enabled. In the UART mode, it is used only to specify the FIFO configuration.
disabled while transmission is in progress, transmission is inhibited only after the
current frame of data is completed for transmission
IDLE
0: Stop
1: Start
I2S0
R/W
7
0
Transfer mode setting
00: Transfer
prohibited
01: Half duplex(RX)
10:Half duplex(TX)
11:Full duplex
FDPX1
R/W
6
0
Under development
Page208
FDPX0
R/W
5
0
Transmit
control
0:Disable
d
1:
Enabled
TXE
R/W
4
0
Interval
transmission
(for I/O interface)
000: None 100:8SCLK
001:1SCLK 101:16SCLK
010:2SCLK 110:32SCLK
011:4SCLK 111:64SCLK
SINT2
R/W
3
0
.
time
SINT1
R/W
2
0
of
continuous
SINT0
R/W
1
0
see note)
TMPM330
Write “0”.
R/W
0
0
-
. If