TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 438

• Manufacturer Part Number: TMPM330FWFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
• Manufacturer: Toshiba

Specifications of TMPM330FWFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 128K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

18 Flash Memory Operation
Under development
TMPM330
careful in doing so because data cannot be written normally if the operation is interrupted.
When a single page has been command written normally terminating the automatic page
writing process, the FLCS [0] <RDY/BSY> bit is set to "1" and it returns to the read mode.
When multiple pages are to be written, it is necessary to execute the page programming
command for each page because the number of pages to be written by a single execution of
the automatic page program command is limited to only one page. It is not allowed for
automatic page programming to process input data across pages.
Data cannot be written to a protected block. When automatic programming is finished, it
automatically returns to the read mode. This condition can be checked by monitoring FLCS
[0] <RDY/BSY> (Table 18-15). If automatic programming has failed, the flash memory is
locked in the mode and will not return to the read mode. For returning to the read mode, it is
necessary to execute hardware reset to reset the flash memory or the device. In this case,
while writing to the address has failed, it is recommended not to use the device or not to use
the block that includes the failed address.
(Note) Software reset becomes ineffective in bus write cycles on and after the fourth
bus write cycle of the automatic page programming command.
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