TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 258

no-image

TMPM330FWFG

Manufacturer Part Number
TMPM330FWFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
Manufacturer
Toshiba
Datasheets

Specifications of TMPM330FWFG

Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
128K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM330FWFG
Manufacturer:
Toshiba
Quantity:
10 000
12 Serial Bus Interface (SBI)
12.5.6
Configuring the SBI as a Transmitter or a Receiver
Setting SBIxCR2 <TRX> to “1” configures the SBI as a transmitter. Setting <TRX> to “0”
configures the SBI as a receiver.
At the slave mode, the SBI receives the direction bit (
following occasions:
If the value of the direction bit (
“0,” <TRX> is set to “0”.
As a master device, the SBI receives acknowledgement from a slave device. If the direction
bit of “1” is transmitted, <TRX> is set to “0” by the hardware. If the direction bit is “0,” <TRX>
changes to “1.” If the SBI does not receive acknowledgement, <TRX> retains the previous
value.
<TRX> is cleared to “0” by the hardware when it detects the stop condition on the bus or the
arbitration lost.
when data is transmitted in the addressing format
when the received slave address matches the value specified at I2CCR
when a general-call address is received; i.e., the eight bits following the start
condition are all zeros
Under development
Page246
R/
W
) is “1,” <TRX> is set to “1” by the hardware. If the bit is
R/
W
) from the master device on the
TMPM330

Related parts for TMPM330FWFG