TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 332

• Manufacturer Part Number: TMPM330FWFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
• Manufacturer: Toshiba

Specifications of TMPM330FWFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 128K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

14 Remote control signal preprocessor (RMC)
14.3 Operation Description
Data reception completed by detecting the max data bit cycle
Waiting for
14.3.1
leader
14.3.1.1 Sampling Clock
14.3.1.2 Basic Operation
falling edge cycle, the data bit is determined as 0 or 1. By detecting a leader while RMC is waiting for
a leader, a leader detection interrupt is generated, and the data bit reception starts. The data bit is
determined as 0 or 1 based on a falling edge cycle. RMC is capable of receiving data up to 72bit.
Reception is completed by detecting either a maximum data bit cycle or the excess low width. On
completion of reception, RMC is waiting for the next leader, and the Remote Control Receive Data
Buffer Registers and the Remote Control Receive Status Register are updated.
A remote control signal is sampled by low-speed clock (fs).
RMC starts to receive a data bit if a leader is detected while RMC is waiting for a leader. Based on a
Detecting leader
Reception of Remote Control Signal
Under development
Capable of receiving
data up to 72bit
Page320
Maximum data bit cycle interrupt
Specified period of a maximum
data bit cycle
Waiting for
TMPM330
leader