TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 241
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TMPM330FWFG
Manufacturer Part Number
TMPM330FWFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
Manufacturer
Toshiba
Specifications of TMPM330FWFG
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
128K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
Details
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Protocol
Select the 9-bit UART mode for the master and slave controllers.
Set SC0MOD <WU> to “1” for the slave controllers to make them ready to receive data.
The master controller is to transmit a single frame of data that includes the slave controller
select code (8 bits). In this, the most significant bit (bit 8) <TB8> must be set to “1”.
Each slave controller receives the above data frame; if the code received matches with the
controller's own select code, it clears the WU bit to “0”.
The master controller transmits data to the designated slave controller (the controller of
which SC0MOD <WU> bit is cleared to “0”). In this, the most significant bit (bit 8) <TB8>
must be set to “0”.
The slave controllers with the <WU> bit set to “1” ignore the receive data because the most
significant bit (bit 8) <RB8> is set to “0” and thus no interrupt (INTRX0) is generated.
Also, the slave controller with the <WU> bit set to “0” can transmit data to the master
controller to inform that the data has been successfully received.
An example: Using the internal clock f
serially linked as follows.
start
start
TXD
Master
bit 0
bit 0
RXD
1
1
Slave controller select code
2
2
Under development
3
3
Data
Page229
TXD
4
4
Select code
00000001
Slave 1
SYS
5
5
RXD
as the transfer clock, two slave controllers are
6
6
7
7
TXD
Select code
00001010
bit 8
Slave 2
“1”
“0”
8
RXD
stop
stop
TMPM330
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