TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 270

• Manufacturer Part Number: TMPM330FWFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
• Manufacturer: Toshiba

Specifications of TMPM330FWFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 128K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

12 Serial Bus Interface (SBI)
<TRX>
1
0
<AL>
1
0
1
0
<AAS> <AD0>
1
1
0
1
0
1
0
1/0
1/0
1/0
0
0
0
0
Table 12-2 Processing in Slave Mode
Arbitration Lost is detected while the
slave address was being transmitted
and the SBI received a slave address
with the direction bit “1” transmitted by
another master.
In the slave receiver mode, the SBI
received a slave address with the
direction bit “1” transmitted by the
master.
In the slave transmitter mode, the SBI
has completed a transmission of one
data word.
Arbitration Lost is detected while a
slave address is being transmitted,
and the SBI receives either a slave
address with the direction bit “0” or a
general-call address transmitted by
another master.
Arbitration Lost is detected while a
slave address or a data word is being
transmitted, and the transfer is
terminated.
In the slave receiver mode, the SBI
received either a slave address with
the direction bit “0” or a general-call
address transmitted by the master.
In the slave receiver mode, the SBI
has completed a reception of a data
word.
Under development
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State
Test LRB. If it has been set to “1,” that
means the receiver does not require
further data. Set <PIN> to 1 and reset
<TRX> to 0 to release the bus.
<LRB> has been reset to “0,” that
means the receiver requires further
data. Set the number of bits in the data
word to <BC2:0> and write the transmit
data to the SBIxDBR.
Set the number of bits in a data word to
<BC2:0> and write the transmit data
into SBIxDBR.
Read the SBIxDBR (a dummy read) to
set <PIN> to 1, or write “1” to <PIN>.
Set the number of bits in the data word
to <BC2:0> and read the received data
from SBIxDBR.
Processing
TMPM330
If