TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 454
TMPM330FWFG
Manufacturer Part Number
TMPM330FWFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
Manufacturer
Toshiba
Specifications of TMPM330FWFG
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
128K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
Details
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Manufacturer
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19 ROM protection
19.4 Writing and erasing
19.4.1
19.4.2
1) Write the code 0xa74a9d23 to SECBIT register.
2) Write data within 16 clocks from the above.
Note) The above procedure is enabled only when using 32-bit data transfer command.
Writing and erasing protection bits are available with a single chip mode, single boot mode and
writer mode.
Writing to the protection bits is done on block-by-block basis.
Erasing of the protection bits is done by two groups of the blocks: block 0 through 3 and block 4
through 5. When the settings for all the blocks are “1”, erasing must be done after setting the
SECBIT <SECBIT> bit to “0”. Setting “1” at that situation erases all the protection bits. To write and
erase the protection bits, command sequence is used.
See chapter 18 for details.
Rewriting of the security bits is available with a single chip mode and single boot mode. The SECBIT
<SECBIT> bit that activates security function is set to “1” at a power-on reset right after power-on.
The bit is rewritten by the following procedure.
Protection bits
Security bit
Under development
Page442
TMPM330
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