TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 373

• Manufacturer Part Number: TMPM330FWFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
• Manufacturer: Toshiba

Specifications of TMPM330FWFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 128K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

WDMOD
(0x4004_0000)
WDCR
(0x4004_0004)
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
SYSCR1
clock
value
<GEAR2:0>
000 （ fc ）
100 (fc/2)
101 (fc/4)
110 (fc/8)
Detection time of watchdog timer
gear
WDT
control
1: enable
B1H : WDT disable code
4EH : WDT clear code
WDTE
R/W
7
7
1
1.63 ms
3.28 ms
6.55 ms
13.11 ms
000
Selects WDT detection time
Fig. 16-4 Watchdog Timer Registers
000: 2
001: 2
010: 2
011: 2
100: 2
101: 2
110: Setting prohibited
111: Setting prohibited
WDTP2
Watchdog Timer Control Register
Watchdog Timer Mode Register
6
6
0
16
18
20
22
24
26
/f
/f
/f
/f
/f
/f
SYS
SYS
SYS
SYS
SYS
SYS
6.55 ms
13.11 ms
26.21 ms
52.43 ms
WDTP1
Under development
R/W
001
5
5
0
Page361
Detection time of watchdog timer
WDTP0
26.21 ms
52.43 ms
104.86 ms
209.72 ms
4
4
0
WDMOD<WDTP2:0>
010
⎯
W
⎯
"0"
read.
@ fc = 40 MHz
Enable/disable control of the watchdog timer
Watchdog timer out control
3
3
R
0
1
0
1
Others
104.86 ms
209.72 ms
419.43 ms
838.86 ms
B1H
4EH
is
Generates NMI interrupt
Connects WDT out to reset
Disable
Enable
011
Disable & clear of WDT
IDLE
0: Stop
1: Start
I2WDT
2
2
0
WDT disable code
WDT clear code
⎯
R/W
419.43 ms
838.86 ms
1.68 s
3.36 s
0:
Generates
NMI
interrupt
1:
Connects
WDTOUT
to reset
RESCR
100
1
1
1
Write "0."
1.68 s
3.36 s
6.71 s
13.42 s
R/W
TMPM330
0
0
0
101