TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 52

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TMPM330FWFG

Manufacturer Part Number
TMPM330FWFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
Manufacturer
Toshiba
Datasheets

Specifications of TMPM330FWFG

Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
128K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM330FWFG
Manufacturer:
Toshiba
Quantity:
10 000
7 Clock/Mode Control
Table 7-2 shows the warm-up time.
7.3.3
7.3.4
(Note)
PLL requires a certain amount of time to be stabilized, which should be secured using the warm-up
function.
returning from the low power consumption mode triggers the automatic timer count. After the specified
time is reached, the system clock is output and the CPU starts operation.
warm-up time in consideration of the stability time of the PLL and the internal oscillator.
OSCCR0<WUEON><WUEF> is used to confirm the start and completion of warm-up through software
(instruction). After the completion of warm-up is confirmed, switch the system clock by setting the
CKSEL<SYSCK>.
CKSEL<SYSCKFLG>.
lowers the oscillator input frequency while increasing the internal clock speed.
This circuit outputs the fpll clock that is quadruple of the high-speed oscillator output clock, fosc. This
The PLL is disabled after reset is released. To enable the PLL, set "1" to the OSCCR0<WUEF> bit. The
The warm-up function secures the stability time for the oscillator and the PLL with the warm-up timer.
The warm-up function is used when returning from STOP/SLEEP mode. In this case, an interrupt for
In STOP/ SLEEP modes, the PLL is disabled. When returning from these modes, configure the
How to configure the warm-up function
Specify the count up clock for the warm-up counter in the OSCCR0<WUPSEL> bit.
The
When clock switching occurs, the current system clock can be checked by monitoring the
Clock Multiplication Circuit (PLL)
Warm-up Function
It takes approx. 200μs for the PLL to be stabilized
warm-up
time
can
be
Under development
selected
Page40
by
setting
the
OSCCR0<WUPT2:0>.
TMPM330
The

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