TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 408

• Manufacturer Part Number: TMPM330FWFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
• Manufacturer: Toshiba

Specifications of TMPM330FWFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 128K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

18 Flash Memory Operation
•
•
(3) Interface specification
(4) Data Transfer Format
In Single Boot mode, an SIO channel is used for communications with a programming controller. The
same configuration is applied to a communication format on a programming controller to execute the
on-board programming. Both UART (asynchronous) and I/O Interface (synchronous) modes are
supported. The communication formats are shown below.
UART communication
Communication channel
Serial transfer mode
Data length
Parity bits
STOP bits
Baud rate
I/O interface mode
Communication channel
Serial transfer mode
Synchronization clock (SCLK0)
Handshaking signal
Baud rate
Table 18-4 and Table 18-6 to Table 18-9 illustrate the operation commands and data transfer formats
at each operation mode. In conjunction with this section, refer to (6) Operation of Boot Program.
Power supply
pins
Mode-setting pin
Reset pin
Communication
pins
Pins
Table 18-4 Single Boot Mode Commands
Code
10H
20H
30H
40H
BOOT
SCLK0(PE2)
RXD0(PE1)
TXD0(PE0)
Table 18-3 Required Pin Connections
REGVCC
REGVSS
RESET
DVCC
CVCC
AVCC
AVSS
DVSS
CVSS
PE4
(PH0)
Under development
: SIO channel 0
: UART (asynchronous), half -duplex, LSB fast
: 8 bit
: None
: 1 bit
: Arbitrary baud rate
: SIO channel 0
: I/O interface mode, full -duplex, LSB fast
: Input mode
: PE4 configured as an output mode
: Arbitrary baud rate
Page396
RAM transfer
Show Flash Memory SUM
Show Product Information
Chip and protection bit erase
UART
○
○
○
○
○
○
○
○
○
○
○
○
x
x
Command
Interface
I/O Interface Mode
○ (Output mode)
○
○
○
○
○
○
○
○
○
○
○
○
○ (Input mode)
TMPM330