TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 59

• Manufacturer Part Number: TMPM330FWFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
• Manufacturer: Toshiba

Specifications of TMPM330FWFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 128K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

Not
Ports
Ports
○：
×：
Input or output enabled
Input or output disabled.
X1, XT1
X2, XT2
RESET, NMI, MODE
PA0, PB0
[When used as a debug pin (PxFR<n>=1)
and output is enabled (PxCR<n>=1)]
PF7, PG3, PJ0-3, PJ6, PJ7
[When used as an interrupt pin
(PxFR<n>=1) and input is enabled
(PxIE<n>=1)]
Other port pins
Pin Name
Table 7-6 Pin States in STOP Mode
Under development
Output only
Input only
Input only
Output
Output
Output
Input
Input
Input
I/O
Page47
Disabled when data is invalid.
Enabled when data is valid.
“H” level output
<DRVE>=0
×
○
×
○
×
×
×
Disabled when data is invalid.
Enabled when data is valid.
Depends on PxCR<n>.
Depends on PxCR<n>.
Depends on PxIE<n>.
Depends on PxIE<n>.
“H” level output
<DRVE>=1
○
○
×
TMPM330