TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 458
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TMPM330FWFG
Manufacturer Part Number
TMPM330FWFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
Manufacturer
Toshiba
Specifications of TMPM330FWFG
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
128K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
Details
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Part Number
Manufacturer
Quantity
Price
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20 Special Function Registers
<PORT G>
<PORT H>
<PORT I>
[1] Port 3/4]
0x4000_01CA
0x4000_01CB
0x4000_01CC
0x4000_01CD
0x4000_01CE
0x4000_018A
0x4000_018B
0x4000_018C
0x4000_018D
0x4000_018E
0x4000_01C0
0x4000_01C1
0x4000_01C2
0x4000_01C3
0x4000_01C4
0x4000_01C5
0x4000_01C6
0x4000_01C7
0x4000_01C8
0x4000_01C9
0x4000_01CF
0x4000_020A
0x4000_020B
0x4000_020C
0x4000_020D
0x4000_020E
0x4000_0180
0x4000_0181
0x4000_0182
0x4000_0183
0x4000_0184
0x4000_0185
0x4000_0186
0x4000_0187
0x4000_0188
0x4000_0189
0x4000_018F
0x4000_0200
0x4000_0201
0x4000_0202
0x4000_0203
0x4000_0204
0x4000_0205
0x4000_0206
0x4000_0207
0x4000_0208
0x4000_0209
0x4000_020F
ADR
ADR
ADR
Register
Register
Register
PGFR1
PHFR1
PGCR
PHCR
PIFR1
name
name
name
<R0>
<R0>
<R0>
<R0>
<R0>
<R0>
<R0>
<R0>
<R0>
<R0>
<R0>
<R0>
<R0>
<R0>
<R0>
<R0>
<R0>
<R0>
<R0>
<R0>
<R0>
PICR
<R0>
<R0>
<R0>
<R0>
<R0>
<R0>
PG
PH
PI
0x4000_01DA
0x4000_01DB
0x4000_01DC
0x4000_01DD
0x4000_01DE
0x4000_01DF
0x4000_019A
0x4000_019B
0x4000_019C
0x4000_019D
0x4000_019E
0x4000_01D0
0x4000_01D1
0x4000_01D2
0x4000_01D3
0x4000_01D4
0x4000_01D5
0x4000_01D6
0x4000_01D7
0x4000_01D8
0x4000_01D9
0x4000_021A
0x4000_021B
0x4000_021C
0x4000_021D
0x4000_021E
0x4000_0190
0x4000_0191
0x4000_0192
0x4000_0193
0x4000_0194
0x4000_0195
0x4000_0196
0x4000_0197
0x4000_0198
0x4000_0199
0x4000_019F
0x4000_0210
0x4000_0211
0x4000_0212
0x4000_0213
0x4000_0214
0x4000_0215
0x4000_0216
0x4000_0217
0x4000_0218
0x4000_0219
0x4000_021F
ADR
ADR
ADR
<reserved>
<reserved>
<reserved>
<reserved>
<reserved>
<reserved>
<reserved>
<reserved>
<reserved>
<reserved>
<reserved>
<reserved>
Under development
Register
Register
Register
name
name
name
Page446
0x4000_01AA
0x4000_01AB
0x4000_01AC
0x4000_01AD
0x4000_01AE
0x4000_01EA
0x4000_01EB
0x4000_01EC
0x4000_01ED
0x4000_01EE
0x4000_01A0
0x4000_01A1
0x4000_01A2
0x4000_01A3
0x4000_01A4
0x4000_01A5
0x4000_01A6
0x4000_01A7
0x4000_01A8
0x4000_01A9
0x4000_01AF
0x4000_01E0
0x4000_01E1
0x4000_01E2
0x4000_01E3
0x4000_01E4
0x4000_01E5
0x4000_01E6
0x4000_01E7
0x4000_01E8
0x4000_01E9
0x4000_01EF
0x4000_022A
0x4000_022B
0x4000_022C
0x4000_022D
0x4000_022E
0x4000_022F
0x4000_0220
0x4000_0221
0x4000_0222
0x4000_0223
0x4000_0224
0x4000_0225
0x4000_0226
0x4000_0227
0x4000_0228
0x4000_0229
ADR
ADR
ADR
Register
Register
Register
PGPUP
PHPUP
PGOD
PIPUP
name
name
name
<R0>
<R0>
<R0>
<R0>
<R0>
<R0>
<R0>
<R0>
<R0>
<R0>
<R0>
<R0>
0x4000_01BC
0x4000_01BD
0x4000_01B0
0x4000_01B1
0x4000_01B2
0x4000_01B3
0x4000_01B4
0x4000_01B5
0x4000_01B6
0x4000_01B7
0x4000_01B8
0x4000_01B9
0x4000_01BA
0x4000_01BB
0x4000_01BE
0x4000_01BF
0x4000_01FA
0x4000_01FB
0x4000_01FC
0x4000_01FD
0x4000_01FE
0x4000_01FF
0x4000_023A
0x4000_023B
0x4000_023C
0x4000_023D
0x4000_023E
0x4000_01F0
0x4000_01F1
0x4000_01F2
0x4000_01F3
0x4000_01F4
0x4000_01F5
0x4000_01F6
0x4000_01F7
0x4000_01F8
0x4000_01F9
0x4000_0230
0x4000_0231
0x4000_0232
0x4000_0233
0x4000_0234
0x4000_0235
0x4000_0236
0x4000_0237
0x4000_0238
0x4000_0239
0x4000_023F
ADR
ADR
ADR
Register
Register
Register
name
name
name
PGIE
<R0>
<R0>
<R0>
<R0>
<R0>
<R0>
<R0>
<R0>
<R0>
PHIE
PIIE
TMPM330
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