D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 125
![IC SUPER H MPU ROMLESS 208QFP](/photos/12/31/123145/d6417729rhf200bv_sml.jpg)
D6417729RHF200BV
Manufacturer Part Number
D6417729RHF200BV
Description
IC SUPER H MPU ROMLESS 208QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.D6417729RF133BV.pdf
(857 pages)
Specifications of D6417729RHF200BV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.85 V ~ 2.15 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D6417729RHF200BV
Manufacturer:
EVERLIGHT
Quantity:
1 000
Company:
Part Number:
D6417729RHF200BV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 125 of 857
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Table 2.28 Single Data Transfer Instructions
Instruction
MOVS.W @-As,Ds
MOVS.W @As,Ds
MOVS.W @As+,Ds
MOVS.W @As+Ix,Ds
MOVS.W Ds,@-As*
MOVS.W Ds,@As*
MOVS.W Ds,@As+*
MOVS.W Ds,@As+Ix* 111101AADDDD1101 MSW of Ds
MOVS.L @-As,Ds
MOVS.L @As,Ds
MOVS.L @As+,Ds
MOVS.L @As+Ix,Ds
MOVS.L Ds,@-As
MOVS.L Ds,@As
MOVS.L Ds,@As+
MOVS.L Ds,@As+Ix
Note: * If guard bit registers A0G and A1G are specified in source operand Ds, the data is output
to the LDB[7:0] bus and the sign bit is copied into the upper bits, [31:8].
Instruction Code
111101AADDDD0000 As – 2
111101AADDDD0100 (As)
111101AADDDD1000 (As)
111101AADDDD1100 (Asc)
111101AADDDD0001 As – 2
111101AADDDD0101 MSW of Ds
111101AADDDD1001 MSW of Ds
111101AADDDD0010 As – 4
111101AADDDD0110 (As)
111101AADDDD1010 (As)
111101AADDDD1110 (As)
111101AADDDD0011 As – 4
111101AADDDD0111 Ds
111101AADDDD1011 Ds
111101AADDDD1111 Ds
Operation
MSW of Ds, 0
0
0
0
MSW of Ds
As + 2
As + Ix
LSW of Ds
LSW of Ds, As + 2
LSW of Ds, As + Ix
(As)
(As), As + 4
(As), As + Ix
MSW of Ds,
MSW of Ds,
Ds
Ds, As + 4
Ds, As + Ix
MSW of Ds,
As, (As)
As, Ds
As, (As)
As,
As
As
(As)
(As)
(As),
(As),
LSW of Ds
Rev. 5.0, 09/03, page 77 of 806
(As)
Ds
As
As
As
As
As
As
Execu-
tion
States
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
DC
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—
—
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