D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 285

IC SUPER H MPU ROMLESS 208QFP

D6417729RHF200BV

Manufacturer Part Number
D6417729RHF200BV
Description
IC SUPER H MPU ROMLESS 208QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of D6417729RHF200BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.85 V ~ 2.15 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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9.5
9.5.1
Setting the standby control register MSTP9–MSTP0 bits to 1 halts the supply of clocks to the
corresponding on-chip peripheral modules. This function can be used to reduce the power
consumption in sleep mode. The module standby function holds the state prior to halting the
external pins of the on-chip peripheral modules. TMU external pins hold their state prior to the
halt. SCI external pins go to the reset state. With a few exceptions, all registers hold their values.
Notes: 1. The registers initialized are the same as in standby mode (see table 9.4).
9.5.2
The module standby function can be cleared by clearing the MSTP9–MSTP0 bits to 0, or by a
power-on reset or manual reset.
Bit
MSTP9
MSTP8
MSTP7
MSTP6
MSTP5
MSTP4
MSTP3
MSTP2
MSTP1
MSTP0
2. The counter runs.
3. Before putting the RTC into module standby status, first access one or more o f the
Module Standby Function
Transition to Module Standby Function
Clearing Module Standby Function
RTC, SCI, and TMU registers. The RTC may then be put into module standby status.
Value
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Description
X/Y memory runs
Supply of clock to X/Y memory halted
UBC runs
Supply of clock to UBC halted
DMAC runs
Supply of clock to DMAC halted
DAC runs
Supply of clock to DAC halted
ADC runs
Supply of clock to ADC halted, and all registers initialized
SCIF runs
Supply of clock to SCIF halted
IrDA runs
Supply of clock to IrDA halted
TMU runs
Supply of clock to TMU halted. Registers initialized *
RTC runs
Supply of clock to RTC halted. Register access prohibited *
SCI runs
Supply of clock to SCI halted
Rev. 5.0, 09/03, page 237 of 806
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2
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