D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 590

IC SUPER H MPU ROMLESS 208QFP

D6417729RHF200BV

Manufacturer Part Number
D6417729RHF200BV
Description
IC SUPER H MPU ROMLESS 208QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of D6417729RHF200BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.85 V ~ 2.15 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Part Number:
D6417729RHF200BV
Manufacturer:
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16.3.5
Only the internal clock generated by the on-chip baud rate generator can be used as the
communication clock in the smart card interface. The bit rate for the clock is set by the bit rate
register (SCBRR) and the CKS1 and CKS0 bits in the serial mode register (SCSMR), and is
calculated using the equation below. Table 16.5 shows sample bit rates. If clock output is then
selected by setting CKE0 to 1, a clock with a frequency 372 times the bit rate is output from the
SCK0 pin.
Where: N
Rev. 5.0, 09/03, page 542 of 806
In the inverse convention type, the logical 1 level is state A, the logical 0 level is state Z, and
communication is MSB first. The start character data is H'3F. Parity is even (from the smart
card standard), and so the parity bit is 0, which corresponds to state Z.
Only data bits D7–D0 are inverted by the SINV bit. To invert the parity bit, set the O/E bit in
SCSMR to odd parity mode. This applies to both transmission and reception.
(Z)
(Z)
B =
B
P
n
Clock
0 to 3 (table 16.4)
1488
Value set in SCBRR (0
Bit rate (bits/s)
Peripheral module operating frequency (MHz)
Ds
Ds
A
A
2
Z
D0
Z
D7
2n 1
b. Inverse convention (SDIR, SINV, and O/E are all 1)
P
a. Direct convention (SDIR, SINV, and O/E are all 0)
Figure 16.4 Waveform of Start Character
Z
D1
Z
D6
(N + 1)
A
D2
A
D5
10
N
6
Z
D3
A
D4
255)
Z
D4
A
D3
Z
D5
A
D2
A
D6
A
D1
A
D7
A
D0
Dp
Dp
Z
Z
(Z)
(Z)
State
State

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