D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 306

• Manufacturer Part Number: D6417729RHF200BV
• Description: IC SUPER H MPU ROMLESS 208QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of D6417729RHF200BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.85 V ~ 2.15 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Bits 14, 3, and 2—Internal Clock Frequency Division Ratio (IFC2, IFC1, IFC0): These bits
specify the frequency division ratio of the internal clock with respect to the output frequency of
PLL circuit 1.
Bit 14: IFC2
0
0
1
0
Values except above
Note: Do not set the internal clock frequency lower than the CKIO pin frequency.
Bits 13, 1, and 0—Peripheral Clock Frequency Division Ratio (PFC2, PFC1, PFC0): These
bits specify the division ratio of the peripheral clock frequency with respect to the frequency of the
output frequency of PLL circuit 1 or the frequency of the CKIO pin.
Bit 13: PFC2
0
0
1
0
1
Values except above
Note: Do not set the peripheral clock frequency higher than the CKIO pin frequency.
Bits 12 to 9, 7, and 6—Reserved: These bits are always read as 0. The write value should always
be 0.
Bit 8—Reserved: This bit is always read as 1. The write value should always be 1.
Rev. 5.0, 09/03, page 258 of 806
Bit 3: IFC1
0
0
0
1
Bit 1: PFC1
0
0
0
1
0
Bit 2: IFC0
0
1
0
0
Bit 0: PFC0
0
1
0
0
1
Description
Reserved (Setting prohibited)
Description
Reserved (Setting prohibited)
1
1/2
1/3
1/4
1
1/2
1/3
1/4
1/6
(Initial value)
(Initial value)