D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 371

IC SUPER H MPU ROMLESS 208QFP

D6417729RHF200BV

Manufacturer Part Number
D6417729RHF200BV
Description
IC SUPER H MPU ROMLESS 208QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of D6417729RHF200BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.85 V ~ 2.15 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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D6417729RHF200BV
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Address Multiplexing: Synchronous DRAM can be connected without external multiplexing
circuitry in accordance with the address multiplex specification bits AMX2-AMX0 in MCR. Table
11.13 shows the relationship between the address multiplex specification bits and the bits output at
the address pins.
A25–A16 and A0 are not multiplexed; the original values are always output at these pins.
When A0, the LSB of the synchronous DRAM address, is connected to the SH7729R, it performs
longword address specification. Connection should therefore be made in the following order: with
a 32-bit bus width, connect pin A0 of the synchronous DRAM to pin A2 of the SH7729R, then
connect pin A1 to pin A3; with a 16-bit bus width, connect pin A0 of the synchronous DRAM to
pin A1 of the SH7729R, then connect pin A1 to pin A2.
SH7729R
Figure 11.13 Example of 64-Mbit Synchronous DRAM (16-Bit Bus Width)
DQMLU
DQMLL
RD/WR
RAS3x
CASx
CKIO
CKE
CSn
D15
A14
A13
A12
D0
A1
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Rev. 5.0, 09/03, page 323 of 806
64M synchronous DRAM
·
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(1M × 16 bit × 4 bank)
A13
A12
A11
A0
CLK
CKE
CS
RAS
CAS
WE
DQ15
DQ0
DQMU
DQML
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