D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 433

• Manufacturer Part Number: D6417729RHF200BV
• Description: IC SUPER H MPU ROMLESS 208QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of D6417729RHF200BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.85 V ~ 2.15 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

12.2.5
The DMA operation register (DMAOR) is a 16-bit readable/writable register that controls the
DMAC transfer mode. Writing to bits 15 to 10 and bits 7 to 3 is invalid in this register; 0 is always
read if these bits are read.
DMAOR is initialized to 0 by a power-on reset, and in hardware standby mode or software
standby mode.
Note: * Only 0 can be written to the AE and NMIF bits after 1 is read.
Bits 15 to 10—Reserved: These bits are always read as 0. The write value should always be 0.
Bits 9 and 8—Priority Mode Bits 1 and 0 (PR1, PR0): Select the priority level between
channels when there are simultaneous transfer requests for multiple channels.
Bits 7 to 3—Reserved: These bits are always read as 0. The write value should always be 0.
Bit 9: PR1
0
0
1
1
Initial value:
Initial value:
DMA Operation Register (DMAOR)
R/W:
R/W:
Bit:
Bit:
Bit 8: PR0
0
1
0
1
15
—
—
R
R
0
7
0
14
—
—
R
R
0
6
0
Description
CH0 > CH1 > CH2 > CH3
CH0 > CH2 > CH3 > CH1
CH2 > CH0 > CH1 > CH3
Round-robin
13
—
—
R
R
0
5
0
12
—
—
R
R
0
4
0
11
—
—
R
R
0
3
0
Rev. 5.0, 09/03, page 385 of 806
R/(W) *
AE
10
—
R
0
2
0
R/(W) *
NMIF
PR1
R/W
9
0
1
0
(Initial value)
DME
R/W
R/W
PR0
8
0
0
0