D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 269

• Manufacturer Part Number: D6417729RHF200BV
• Description: IC SUPER H MPU ROMLESS 208QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of D6417729RHF200BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.85 V ~ 2.15 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

3. Register specifications
4. Register specifications
BARA = H'00027128, BAMRA = H'00000000, BBRA = H'005A, BARB = H'00031415,
BAMRB = H'00000000, BBRB = H'0054, BDRB = H'00000000, BDMRB = H'00000000,
BRCR = H'00300000
Specified conditions: Channel A/channel B independent mode
•
•
On channel A, no user break occurs since an instruction fetch is not a write cycle. On channel
B, no user break occurs since an instruction fetch is performed for an even address.
BARA = H'00037226, BAMRA = H'00000000, BBRA = H'005A, BARB = H'0003722E,
BAMRB = H'00000000, BBRB = H'0056, BDRB = H'00000000, BDMRB = H'00000000,
BRCR = H'00000008, BASRA = H'80, BASRB = H'70
Specified conditions: Channel A/channel B sequential mode
•
•
Since the instruction fetch is not a write cycle on channel A, a sequential condition is not
matched. Therefore, no user break occurs.
Address:
Bus cycle: CPU/instruction fetch (before instruction execution)/write/word
No ASID check is included
Address:
Data:
Bus cycle: CPU/instruction fetch (before instruction execution)/read (operand size is not
No ASID check is included
Address:
Bus cycle: CPU/instruction fetch (before instruction execution)/write/word
Address:
Data:
Bus cycle: CPU/instruction fetch (before instruction execution)/read/word
Channel A
Channel B
Channel A
Channel B
H'00027128, Address mask: H'00000000
H'00031415, Address mask: H'00000000
H'00000000, Data mask: H'00000000
included in the condition)
H'00037226, Address mask: H'00000000, ASID: H'80
H'0003722E, Address mask: H'00000000, ASID: H'70
H'00000000, Data mask: H'00000000
Rev. 5.0, 09/03, page 221 of 806