D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 720

• Manufacturer Part Number: D6417729RHF200BV
• Description: IC SUPER H MPU ROMLESS 208QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of D6417729RHF200BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.85 V ~ 2.15 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

21.4.4
The A/D converter has a built-in sample-and-hold circuit. The A/D converter samples the analog
input at a time t
conversion timing. Table 21.4 indicates the A/D conversion time.
As indicated in figure 21.6, the A/D conversion time includes t
length of t
time therefore varies within the ranges indicated in table 21.4.
In multi mode and scan mode, the conversion time values given in table 21.4 apply to the first
conversion. In the second and subsequent conversions, the conversion time is fixed at 256 states
when CKS = 0 in ADCSR, or 128 states when CKS = 1. In both cases, the CKS bit should be set
according to the P frequency so that the conversion time is within the range shown in table 24.10
in section 24, Electrical Characteristics.
Rev. 5.0, 09/03, page 672 of 806
Input Sampling and A/D Conversion Time
t
t
t
Notes:
D
D
SPL
CONV
varies depending on the timing of the write access to ADCSR. The total conversion
D
after the ADST bit is set to 1, then starts conversion. Figure 21.6 shows the A/D
Input sampling
A/D conversion start delay
Input sampling time
A/D conversion time
1. ADCSR write cycle
2. ADCSR address
Address
timing
signal
Write
ADF
Pφ
Figure 21.6 A/D Conversion Timing
*1
*2
t
D
t
SPL
t
CONV
D
and the input sampling time. The