D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 79

• Manufacturer Part Number: D6417729RHF200BV
• Description: IC SUPER H MPU ROMLESS 208QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of D6417729RHF200BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.85 V ~ 2.15 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

The third kind of operation is a single-data transfer instruction, “MOVS.W” or “MOVS.L”. These
instructions access any memory location through the LDB (figure 2.8). All DSP registers connect
to the LDB and can be the source or destination register of the data transfer. These instructions
have word and longword access modes. In word mode, registers to be loaded or stored by this
instruction comprise the upper 16 bits (bits 31–16) for DSP registers except A0G and A1G. When
data is loaded into a register other than A0G and A1G in word mode, the lower half of the register
is cleared. When A0 or A1 is used, the data is sign-extended to bits 39–32 and the lower half is
cleared. When A0G or A1G is the destination register in word mode, data is loaded into an 8-bit
register, but A0 or A1 is not cleared. In longword mode, when the destination register is A0 or A1,
it is sign-extended to bits 39–32.
Tables 2.3 and 2.4 show the data type of registers used in DSP instructions. Some instructions
cannot use some registers shown in the tables because of instruction code limitations. For
example, PMULS can use A1 as the source register, but cannot use A0. These tables ignore details
of register selectability.
Table 2.3
A0, A1
A0G, A1G
X0, X1
Y0, Y1
M0, M1
Registers
Destination Register in DSP Instructions
DSP
Data
transfer
Data
transfer
DSP
Data
transfer
Instructions
Fixed-point, PSHA,
PMULS
Integer, PDMSB
Logical, PSHL
MOVS.W
MOVS.L
MOVS.W
MOVS.L
Fixed-point, PSHA,
PMULS
Integer, logical,
PDMSB, PSHL
MOVX/Y.W, MOVS.W
MOVS.L
39
Sign-extended 40-bit result
Sign-extended 24-bit result
Cleared
Sign-extended 16-bit data
Sign-extended 32-bit data
Data
Data
Guard Bits
32 31
Rev. 5.0, 09/03, page 31 of 806
16-bit result
No update
No update
32-bit result
16-bit result
16-bit result
32-bit data
Register Bits
16 15
Cleared
Cleared
Cleared
Cleared
Cleared
0