D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 259

IC SUPER H MPU ROMLESS 208QFP

D6417729RHF200BV

Manufacturer Part Number
D6417729RHF200BV
Description
IC SUPER H MPU ROMLESS 208QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of D6417729RHF200BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.85 V ~ 2.15 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D6417729RHF200BV
Manufacturer:
EVERLIGHT
Quantity:
1 000
Part Number:
D6417729RHF200BV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
When the execution-times break condition of channel B is enabled, this register specifies the
number of execution times to make the break. The maximum number is 2
initialized to H'0000 by a power-on reset. When a break condition is satisfied, the BETR value is
decremented by 1. A break is issued when the break condition is satisfied after the BETR value
reaches H'0001. Bits 15–12 are always read as 0, and 0 should always be written to these bits.
8.2.11
Note: * Undefined
BRSR is a 32-bit read-only register that stores the last fetched address before a branch and the
pointer (3 bits) which indicates the number of cycles from fetch to execution for the last executed
instruction. BRSR has a flag bit that is set to 1 when a branch occurs. This flag bit is cleared to 0
when BRSR is read, and also is initialized by a power-on reset or manual reset. Other bits are not
initialized by a reset. Four BRSR registers have a queue structure and the stored register is shifted
every branch.
Initial value:
Initial value:
Initial value:
Initial value:
Branch Source Register (BRSR)
R/W:
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
Bit:
BSA23
BSA15
BSA7
SVF
31
23
15
R
R
R
R
0
7
*
*
*
BSA22
BSA14
BSA6
PID2
30
22
14
R
R
R
R
6
*
*
*
*
BSA21
BSA13
BSA5
PID1
29
21
13
R
R
R
R
*
*
*
5
*
BSA20
BSA12
BSA4
PID0
28
20
12
R
R
R
R
4
*
*
*
*
BSA27
BSA19
BSA11
BSA3
27
19
11
R
R
R
R
3
*
*
*
*
Rev. 5.0, 09/03, page 211 of 806
BSA26
BSA18
BSA10
BSA2
26
18
10
12
R
R
R
R
*
*
*
2
*
– 1 times. BETR is
BSA25
BSA17
BSA9
BSA1
25
17
R
R
R
R
9
1
*
*
*
*
BSA24
BSA16
BSA8
BSA0
24
16
R
R
R
R
8
0
*
*
*
*

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