D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 167

IC SUPER H MPU ROMLESS 208QFP

D6417729RHF200BV

Manufacturer Part Number
D6417729RHF200BV
Description
IC SUPER H MPU ROMLESS 208QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of D6417729RHF200BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.85 V ~ 2.15 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D6417729RHF200BV
Manufacturer:
EVERLIGHT
Quantity:
1 000
Part Number:
D6417729RHF200BV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
When writing, the write is performed to the entry selected with the index address and way.
When reading, the VPN, V bit, and ASID of the entry selected with the index address and way in
the format of the data field in figure 3.12 without comparing addresses. 0 is written to data field
bits 16–12.
To invalidate a specific entry, specify the entry and way, and write 0 to the corresponding V bit.
3.6.2
Data Array
The data array is assigned to H'F3000000–H'F3FFFFFF. To access a data array, the 32-bit address
field (for read/write operations), and 32-bit data field (for write operations) must be specified. The
address section specifies information for selecting the entry to be accessed; the data section
specifies the longword data to be written to the data array (figure 3.15 (2)). Longword data has the
same bit configuration as PTEL.
In the address field, specify VPN (16–12) as the index address for selecting the entry (bits 16–12),
the W bits for selecting the way (bits 9–8), and H'F3 to indicate data array access (bits 31–24).
The IX bit in MMUCR indicates whether the EX-OR of VPN (16–12) and ASID (4–0) in the
PTEH register is used as the index address.
Both reading and writing use longword data of the data array specified by the entry address and
way number.
Rev. 5.0, 09/03, page 119 of 806

Related parts for D6417729RHF200BV