D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 95

• Manufacturer Part Number: D6417729RHF200BV
• Description: IC SUPER H MPU ROMLESS 208QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of D6417729RHF200BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.85 V ~ 2.15 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

1. Non-update address register addressing:
2. Addition index register addressing:
3. Increment address register addressing:
4. Decrement address register addressing:
The R8 register is the index register (Is) for the address pointer (As). Single data transfer
addressing is shown in figure 2.13.
Modulo Addressing: Like other DSPs, the SH7729R has a modulo addressing mode. Address
registers are updated in the same way in this mode. When the address pointer value reaches the
preset modulo end address, the address pointer value becomes the modulo start address.
Modulo addressing is only available for the X and Y data transfer instructions (MOVX.W,
MOVY.W). Modulo addressing mode is specified for the X address register by setting the DMX
bit in the SR register, and for the Y address register by setting the DMY bit. Modulo addressing is
The As register is an address pointer. It is not updated.
The As register is an address pointer. After a data transfer, the value of the Is register is added
to the As register (post-increment).
The As register is an address pointer. After a data transfer, the As register is incremented by 2
or 4 (post-increment).
The As register is an address pointer. Before a data transfer, –2 or –4 is added to the As
register (i.e. 2 or 4 is subtracted) (pre-decrement).
−2/−4 (DEC)
+2/+4 (INC)
+0 (no update)
Note: Four address processing methods:
Figure 2.13 Single Data Transfer Addressing
1. No update
2. Index register addition (Is)
3. Increment
4. Decrement
31
R8[Is]
ALU
0
31
R2[As]
R3[As]
R4[As]
R5[As]
32
Post-increment
Pre-decrement
0
Rev. 5.0, 09/03, page 47 of 806
LAB