D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 30

• Manufacturer Part Number: D6417729RHF200BV
• Description: IC SUPER H MPU ROMLESS 208QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of D6417729RHF200BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.85 V ~ 2.15 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 16 Smart Card Interface
16.1 Overview ........................................................................................................................... 533
16.2 Register Descriptions......................................................................................................... 536
16.3 Operation........................................................................................................................... 538
16.4 Usage Notes....................................................................................................................... 551
Section 17 Serial Communication Interface with FIFO (SCIF)
17.1 Overview ........................................................................................................................... 555
17.2 Register Descriptions......................................................................................................... 561
17.3 Operation........................................................................................................................... 581
17.4 SCIF Interrupts .................................................................................................................. 594
17.5 Usage Notes....................................................................................................................... 595
Rev. 5.0, 09/03, page xxviii of xlvi
16.1.1 Features ................................................................................................................ 533
16.1.2 Block Diagram ..................................................................................................... 534
16.1.3 Pin Configuration ................................................................................................. 535
16.1.4 Smart Card Interface Registers............................................................................. 535
16.2.1 Smart Card Mode Register (SCSCMR)................................................................ 536
16.2.2 Serial Status Register (SCSSR) ............................................................................ 537
16.3.1 Overview .............................................................................................................. 538
16.3.2 Pin Connections.................................................................................................... 539
16.3.3 Data Format.......................................................................................................... 540
16.3.4 Register Settings................................................................................................... 541
16.3.5 Clock .................................................................................................................... 542
16.3.6 Data Transmission and Reception ........................................................................ 545
16.4.1 Receive Data Timing and Receive Margin in Asynchronous Mode .................... 551
16.4.2 Retransmission (Receive and Transmit Modes) ................................................... 553
17.1.1 Features ................................................................................................................ 555
17.1.2 Block Diagram ..................................................................................................... 556
17.1.3 Pin Configuration ................................................................................................. 559
17.1.4 Register Configuration ......................................................................................... 560
17.2.1 Receive Shift Register (SCRSR) .......................................................................... 561
17.2.2 Receive FIFO Data Register (SCFRDR).............................................................. 561
17.2.3 Transmit Shift Register (SCTSR)......................................................................... 561
17.2.4 Transmit FIFO Data Register (SCFTDR) ............................................................ 562
17.2.5 Serial Mode Register (SCSMR) ........................................................................... 562
17.2.6 Serial Control Register (SCSCR) ......................................................................... 564
17.2.7 Serial Status Register (SCSSR) ............................................................................ 566
17.2.8 Bit Rate Register (SCBRR) .................................................................................. 571
17.2.9 FIFO Control Register (SCFCR).......................................................................... 578
17.2.10 FIFO Data Count Register (SCFDR) ................................................................... 580
17.3.1 Overview .............................................................................................................. 581
17.3.2 Serial Operation.................................................................................................... 582
...................................................................................... 533
............................. 555