D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 258

• Manufacturer Part Number: D6417729RHF200BV
• Description: IC SUPER H MPU ROMLESS 208QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of D6417729RHF200BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.85 V ~ 2.15 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Bit 6—PC Break Select B (PCBB): Selects the break timing of the instruction fetch cycle for
channel B as before or after instruction execution.
Bit 6: PCBB
0
1
Bits 5 and 4—Reserved: These bits are always read as 0. The write value should always be 0.
Bit 3—Sequence Condition Select (SEQ): Selects two conditions of channels A and B as
independent or sequential.
Bit 3: SEQ
0
1
Bits 2 and 1—Reserved: These bits are always read as 0. The write value should always be 0.
Bit 0—Execution Times Break Enable (ETBE): Enables the execution-times break condition on
channel B only. If this bit is 1 (break enabled), a user break is issued when the number of break
conditions matches the number of execution times specified by the BETR register.
Bit 0: ETBE
0
1
8.2.10
Rev. 5.0, 09/03, page 210 of 806
Initial value:
Initial value:
Break Execution Times Register (BETR)
R/W:
R/W:
Bit:
Bit:
Description
PC break of channel B is set before instruction execution
PC break of channel B is set after instruction execution
Description
Channels A and B are compared as independent conditions
Channels A and B are compared as a sequential condition
Description
Execution-times break condition is masked on channel B
Execution-times break condition is enabled on channel B
R/W
15
—
R
0
7
0
R/W
14
—
R
0
6
0
R/W
13
—
R
0
5
0
R/W
12
—
R
0
4
0
R/W
R/W
11
0
3
0
R/W
R/W
10
0
2
0
R/W
R/W
9
0
1
0
(Initial value)
(Initial value)
(Initial value)
R/W
R/W
8
0
0
0