D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 326

• Manufacturer Part Number: D6417729RHF200BV
• Description: IC SUPER H MPU ROMLESS 208QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of D6417729RHF200BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.85 V ~ 2.15 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Shadow Space: Areas 0 and 2–6 are decoded by physical addresses A28–A26, which correspond
to areas 000 to 110. Address bits 31–29 are ignored. This means that the range of area 0 addresses,
for example, is H'00000000 to H'03FFFFFF, and its corresponding shadow space is the address
space obtained by adding to it H'20000000 n (n
on-chip I/O space, is H'1C000000 to H'1FFFFFFF. The address space H'1C000000 + H'20000000
reserved, and must not be used.
11.1.6
The SH7729R supports PCMCIA standard interface specifications in physical space areas 5 and 6.
Table 11.5 PCMCIA Interface Characteristics
Item
Access
Data bus
Memory type
Memory capacity
I/O space capacity
Other features
Note: * Dynamic bus sizing of the I/O bus width is supported only in little-endian mode.
Rev. 5.0, 09/03, page 278 of 806
n–H'1FFFFFFF + H'20000000
PCMCIA Support
Area 6: H'1A000000
Area 5: H'14000000
Area 5: H'16000000
Area 6: H'18000000
Figure 11.4 PCMCIA Space Allocation
Feature
Random access
8/16 bits
Mask ROM, OTPROM, EPROM, EEPROM, flash memory, SRAM
Maximum 32 Mbytes
Maximum 32 Mbytes
Dynamic bus sizing of I/O bus width *
The PCMCIA interface can be accessed from the address translation
area or non-address translation area.
n (n
0–7) corresponding to the area 7 shadow space is
Common memory/Attribute memory
Common memory/Attribute memory
1–6). The address range for area 7, which is
I/O space
I/O space