D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 688

IC SUPER H MPU ROMLESS 208QFP

D6417729RHF200BV

Manufacturer Part Number
D6417729RHF200BV
Description
IC SUPER H MPU ROMLESS 208QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of D6417729RHF200BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.85 V ~ 2.15 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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20.6.2
The port E data register (PEDR) is an 8-bit readable/writable register that stores data for pins
PTE7 to PTE0. Bits PE7DT to PE0DT correspond to pins PTE7 to PTE0. When the pin function is
general output port, if the port is read the value of the corresponding PEDR bit is returned directly.
When the function is general input port, if the port is read the corresponding pin level is read.
Table 20.10 shows the function of PEDR.
PEDR is initialized to H'00 by a power-on reset, after which the general input port function (pull-
up MOS on) is set as the initial pin function, and the corresponding pin levels are read. It retains
its previous value in standby mode and sleep mode, and in a manual reset.
Table 20.10 Port E Data Register (PEDR) Read/Write Operations
PEnMD1
0
1
Rev. 5.0, 09/03, page 640 of 806
Initial value:
Port E Data Register (PEDR)
PEnMD0
0
1
0
1
R/W:
Bit:
PE7DT
R/W
Pin State
Other function
(See table 19.1)
Output
Input (Pull-up
MOS on)
Input (Pull-up
MOS off)
7
0
PE6DT
R/W
6
0
PE5DT
Read
PEDR value
PEDR value
Pin state
Pin state
R/W
5
0
PE4DT
R/W
4
0
Write
Value is written to PEDR, but does not
affect pin state
Write value is output from pin
Value is written to PEDR, but does not
affect pin state
Value is written to PEDR, but does not
affect pin state
PE3DT
R/W
3
0
PE2DT
R/W
2
0
PE1DT
R/W
1
0
(n = 0 to 7)
PE0DT
R/W
0
0

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