D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 301

• Manufacturer Part Number: D6417729RHF200BV
• Description: IC SUPER H MPU ROMLESS 208QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of D6417729RHF200BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.85 V ~ 2.15 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

10.3
Table 10.3 shows the relationship between the mode control pin (MD2–MD0) combinations and
the clock operating modes. Table 10.4 shows the usable frequency ranges in the clock operating
modes.
Table 10.3 Clock Operating Modes
Mode 0: An external clock is input from the EXTAL pin and undergoes waveform shaping by
PLL circuit 2 before being supplied inside the chip. PLL circuit 1 is constantly on, and there are
no frequency range restrictions compared to mode 3. An input clock frequency of 25 MHz to
66.67 MHz can be used, and the CKIO frequency range is 25 MHz to 66.67 MHz.
As PLL circuit 1 compensates for fluctuations in the CKIO pin load, this mode is suitable for
connection of synchronous DRAM.
Mode 1: An external clock is input from the EXTAL pin and its frequency is multiplied by 4 by
PLL circuit 2 before being supplied inside the chip, allowing a low-frequency external clock to be
used. An input clock frequency of 6.25 MHz to 16.67 MHz can be used, and the CKIO frequency
range is 25 MHz to 66.67 MHz.
As PLL circuit 1 compensates for fluctuations in the CKIO pin load, this mode is suitable for
connection of synchronous DRAM.
Mode MD2 MD1 MD0
0
1
2
7
—
0
0
0
1
Values except
above
Clock Operating Modes
Pin Values
0
0
1
1
1
0
1
0
Source
EXTAL
EXTAL
Crystal
oscillator
CKIO
Reserved (Setting prohibited)
Clock I/O
Output
CKIO
CKIO
CKIO
—
PLL2
On/Off
On,
multi-
plication
ratio: 1
On,
multi-
plication
ratio: 4
On,
multi-
plication
ratio: 4
Off
PLL1
On/Off
On
On
On
On
Divider 1
Input
PLL1
output
PLL1
output
PLL1
output
PLL1
output
Rev. 5.0, 09/03, page 253 of 806
Divider 2
Input
PLL1
PLL1
PLL1
PLL1
(EXTAL)
CKIO
Frequency
(EXTAL)
(Crystal)
(CKIO)
4
4