UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 1053

• Manufacturer Part Number: UPD70F3786GJ-GAE-AX
• Description: MCU 32BIT V850ES/JX3-E 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Er

Specifications of UPD70F3786GJ-GAE-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 100
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 124K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(3) Synchronizing data bit
• The receiving node establishes synchronization by a level change on the bus because it does not have a
• The transmitting node transmits data in synchronization with the bit timing of the transmitting node.
(a) Hardware synchronization
sync signal.
Figure 21-20. Hardware Synchronization Due to Dominant Level Detection During Bus Idle
This synchronization is established when the receiving node detects the start of frame in the interframe
space.
• When a falling edge is detected on the bus, that TQ means the sync segment and the next segment is
the prop segment. In this case, synchronization is established regardless of SJW.
CAN bus
Bit timing
Interframe space
Sync
segment
CHAPTER 21 CAN CONTROLLER
User’s Manual U19601EJ2V0UD
Prop
segment
Start of frame
Phase
segment 1
Phase
segment 2
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