UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 515

• Manufacturer Part Number: UPD70F3786GJ-GAE-AX
• Description: MCU 32BIT V850ES/JX3-E 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Er

Specifications of UPD70F3786GJ-GAE-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 100
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 124K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

<1> Count operation start flow
<2> TT0CCR0 and TT0CCR1 register
setting change flow
(TT0CKS0 to TT0CKS2 bits)
Setting of TT0CCR0 register
Setting of TT0CCR1 register
Remark
Register initial setting
TT0CCR0 register,
TT0CTL1 register,
TT0IOC0 register,
TT0IOC2 register,
TT0CCR1 register
TT0CTL0 register
TT0CE bit = 1
START
Figure 9-24. Software Processing Flow in External Trigger Pulse Output Mode (2/2)
n = 0, 1
CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
Initial setting of these
registers is performed
before setting the
TT0CE bit to 1.
The TT0CKS0 to
TT0CKS2 bits can be
set at the same time
as when counting is
enabled (TT0CE bit = 1).
Trigger wait status.
Writing the same value
(same as preset value of
the TT0CCR1 register)
to the TT0CCR1 register
is necessary only when
the set cycle is changed.
When the counter is
cleared after setting,
the values of the TT0CCRn
register are transferred to
the CCRn buffer register
in a batch.
User’s Manual U19601EJ2V0UD
<3> TT0CCR0, TT0CCR1 register
<4> TT0CCR0, TT0CCR1 register
<5> Count operation stop flow
setting change flow
setting change flow
Setting of TT0CCR1 register
Setting of TT0CCR0 register
Setting of TT0CCR1 register
TT0CE bit = 0
STOP
Counting is stopped.
Writing of the TT0CCR1 register
must be performed when only
the set duty factor is changed.
When the counter is cleared after
setting, the value of the
TT0CCRn register is transferred
to the CCRn buffer register.
When the counter is
cleared after setting,
the value of the TT0CCRn
register is transferred to
the CCRn buffer register.
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