UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 1523

• Manufacturer Part Number: UPD70F3786GJ-GAE-AX
• Description: MCU 32BIT V850ES/JX3-E 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Er

Specifications of UPD70F3786GJ-GAE-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 100
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 124K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

<1> Initializing the Ethernet controller
<2> Creating the reception buffer descriptor
<3> Setting the reception buffer descriptor register and enabling reception
<4> Reading the reception buffer descriptor
<5> Transferring received packets
<6> Judging that the reception buffer is full
<7> Receiving packets
<8> Reporting the end of reception
<9> Preparing the next data
When the current data buffer is full, read the next descriptor.
Initialize the Ethernet controller using the procedure shown in 23.3 Initialization.
Set the reception buffer descriptor address to the RXDP register. Then set the RXS bit of the ETHMODE register.
Transfer the data to the data-only RAM using DMA.
Report the end of reception to the CPU by generating the RXI interrupt request (assuming that the interrupt is not
masked).
The CPU checks the reception status, releases the data buffer, and prepares the next data buffer.
Create the reception buffer descriptor in the memory. When creating the descriptor, set the bits of the reception
buffer descriptor as follows: Set the T bit (to 0), set the U bit (to 0), and set the size bit (indicating the data buffer
size).
Read the reception buffer descriptor using DMA.
Repeat the process of reading the buffer descriptor and transferring the data. When an end-of-frame is received,
1 is written to the status bit (the E bit) of the final reception buffer descriptor and the number of bytes transferred
is written to the size field.
CHAPTER 23 ETHERNET CONTROLLER
User’s Manual U19601EJ2V0UD
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