UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 434

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UPD70F3786GJ-GAE-AX

Manufacturer Part Number
UPD70F3786GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3-E 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Er
Datasheet

Specifications of UPD70F3786GJ-GAE-AX

Core Processor
RISC
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
100
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
124K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3786GJ-GAE-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
UPD70F3786GJ-GAE-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
432
(2) Operation timing in free-running timer mode
(a) Interval operation with compare register
When TABn is used as an interval timer with the TABnCCRm register used as a compare register, software
processing is necessary for setting a comparison value to generate the next interrupt request signal each
time the INTTABnCCm signal has been detected.
Note The V850ES/JH3-E only includes the TOAB13 pin; it is not provided with the TOAB03 pin.
Remark
TOABn3 pin output
INTTABnCC0 signal
INTTABnCC1 signal
INTTABnCC2 signal
INTTABnCC3 signal
TABnCCR0 register
TABnCCR1 register
TABnCCR2 register
TABnCCR3 register
TOABn0 pin output
TOABn1 pin output
TOABn2 pin output
n = 0, 1
16-bit counter
TABnCE bit
FFFFH
0000H
CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
Note
Interval period
Interval period
Interval period
(D
(D
(D
00
D
D
D
+ 1)
10
20
00
10
20
Interval period
+ 1)
User’s Manual U19601EJ2V0UD
+ 1)
D
(D
00
D
30
D
30
Interval period
10
+ 1)
D
(D
20
(10000H + D
01
Interval period
− D
(D
Interval period
D
00
11
D
01
)
− D
01
D
D
Interval period
10
11
30
D
(10000H +
)
D
11
02
D
21
(10000H + D
− D
21
− D
(10000H + D
Interval period
D
01
D
Interval period
21
)
20
D
02
)
02
Interval period
Interval period
D
(D
(D
12
12
22
03
− D
D
D
12
− D
− D
31
11
31
)
D
− D
02
D
D
21
)
Interval period
22
03
03
)
(D
30)
D
Interval period
13
22
D
(10000H + D
(D
− D
D
31
04
13
Interval period
12
− D
)
D
D
03
13
D
04
)
04
D
23
23
D
− D
32
D
D
D
23
14
22
05
)

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