UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 848

• Manufacturer Part Number: UPD70F3786GJ-GAE-AX
• Description: MCU 32BIT V850ES/JX3-E 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Er

Specifications of UPD70F3786GJ-GAE-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 100
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 124K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

846
(1) Serial I/O shift registers n (SIOn)
(2) CSIEn receive data buffer register (CEnRX0)
The following shows the CEnRX0 register in reading by each transfer mode.
Single mode (CEnCTL0.CEnTMS bit = 0)
Consecutive mode (CEnCTL0.CEnTMS bit = 0)
The SIOn register is an 8-bit register for converting between serial data and parallel data. SIOn is used for
both transmission and reception.
Data is shifted in (reception) or shifted out (transmission) beginning at either the MSB side or the LSB side.
The CEnRX0 register is a 16-bit buffer register that stores receive data.
By consecutively reading this register in the continuous mode (CEnCTL0.CEnTMS bit = 1), the received data
in the CSIBUFn register can be sequentially read while the CSIBUFn pointer for reading is incremented.
However, if the number of the read value exceeds the receive data count in the CEnRX0 register, the read
value becomes undefined.
In the single mode (CEnCTL0.CEnTMS bit = 1), received data is read by reading the CEnRX0 register and it is
judged that the CEnRX0 register has become empty.
The CEnRX0 register is read-only, in 16-bit units.
When the higher 8 bits of the CEnRX0 register are used as the CEnRX0H register and the lower 8 bits as the
CEnRX0L register, these registers are read-only, in 8-bit units. When reading in 8-bit units, be sure to read the
CEnRX0H register and CEnRX0L register in that order. The received data is always read from the lower bits,
regardless of the transfer direction. If the received data is 8 bits, read the CEnRX0L register only.
Reset sets this register to 0000H. But, be undefined in the consecutive mode.
In addition to reset input, the CEnRX0 register can be initialized by clearing (to 0) the CEnCTL0.CEnPWR bit.
Caution Because the values of the CEnFLF, CEnEMP, CEnTSF, CEnSFP3 to CEnSFP0 bits may change
Note In continuous mode (CEnCTL0.CEnTMS = 1): Undefined
(n = 0, 1)
CEnRX0
at any time during transfer, their values during transfer may differ from the actual values.
Especially, use the CEnTSF bit independently (do not use this bit in relation with the other
bits). To detect the end of transfer by the CEnSTR register, check to see if the CEnEMF bit is
1 after the data to be transferred has been written to the CSIBUFn register.
After reset: 0000H
Transfer Mode
CHAPTER 18 CLOCKED SERIAL INTERFACE E WITH FIFO (CSIE)
Note
R
User’s Manual U19601EJ2V0UD
Address:
Reading the data value in reception data buffer
Reading the reception data value in the CSIBUFn pointer for current
read showing (the initial value of the CSIBUFn register by reset is
undefined).
CE0RX0 FFFFFB02H,
CE0RX0L FFFFFB02H, CE0RX0H FFFFFB03H,
CE1RX0 FFFFFB42H,
CE1RX0L FFFFFB42H, CE1RX0H FFFFFB43H
CEnRX0