UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 1591

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UPD70F3786GJ-GAE-AX

Manufacturer Part Number
UPD70F3786GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3-E 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Er
Datasheet

Specifications of UPD70F3786GJ-GAE-AX

Core Processor
RISC
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
100
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
124K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3786GJ-GAE-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
UPD70F3786GJ-GAE-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
25.5 Exception Trap
V850ES/JH3-E and V850ES/JJ3-E, an illegal opcode exception (ILGOP: Illegal Opcode Trap) is considered as an
exception trap.
25.5.1 Illegal opcode
to 23) = 0111B to 1111B, and sub-opcode (bit 16) = 0B. When such an instruction is executed, an exception trap is
generated.
An exception trap is an interrupt that is requested when the illegal execution of an instruction takes place. In the
An illegal opcode is defined as an instruction with instruction opcode (bits 10 to 5) = 111111B, sub-opcode (bits 26
Caution It is recommended not to use an illegal opcode because instructions may newly be assigned in
(1) Operation
<1> Saves the restored PC to DBPC.
<2> Saves the current PSW to DBPSW.
<3> Sets the PSW.NP, PSW.EP, and PSW.ID bits to 1.
<4> Sets the handler address (00000060H) corresponding to the exception trap to the PC, and transfers
If an exception trap occurs, the CPU performs the following processing, and transfers control to the handler
routine.
The processing of the exception trap is shown below.
control.
the future.
×: Arbitrary
15
×
×
×
×
CHAPTER 25 INTERRUPT/EXCEPTION PROCESSING FUNCTION
11
×
10
1
1
1
1
1
1
5
User’s Manual U19601EJ2V0UD
×
4
×
×
×
×
0
31
×
×
×
×
27 26
×
0
1
1
1
to
1
1
23 22
1
1
× × × × × × 0
16
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