UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 788

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UPD70F3786GJ-GAE-AX

Manufacturer Part Number
UPD70F3786GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3-E 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Er
Datasheet

Specifications of UPD70F3786GJ-GAE-AX

Core Processor
RISC
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
100
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
124K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Part Number:
UPD70F3786GJ-GAE-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
UPD70F3786GJ-GAE-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
786
(5) Example of continuous transmission processing flow in FIFO mode (CPU control)
Notes 1.
Remark
Set UARTBn-related registers
Figure 16-17. Example of Continuous Transmission Processing Flow in FIFO Mode (CPU Control)
INTUBnTIF interrupt = 1?
UBnTXE = 1 (UBnCTL0)
Write transmit FIFO
2.
3.
START
n = 0, 1
Write more transmit data than the number set as the trigger by the UBnFIC2.UBnTT3 to
UBnFIC2.UBnTT0 bits to transmit FIFO.
This is the case where transmission is ended (transmit FIFO and the transmit shift register become
empty) before the next transmit data is written.
INTUBnTIF and INTUBnTIT signals and write the next data to transmit FIFO.
In the pending mode (UBnFIC0.UBnITM bit = 0), write as many transmit data as the number set as
the trigger by the UBnFIC2.UBnTT3 to UBnFIC2.UBnTT0 bits of to transmit FIFO. In the pointer
mode (UBnITM bit = 1), reference the UBnFIS1.UBnTB4 to UBnFIS1.UBnTB0 bits and write as
many data as the number of empty bytes in transmit FIFO to transmit FIFO.
Write 16-byte data to fully use the 8-bit × 16-stage FIFO function.
Yes
CHAPTER 16 ASYNCHRONOUS SERIAL INTERFACE B WITH FIFO (UARTBn)
Note 1
: Write transmit data
: Enable transmission
No
INTUBnTIT interrupt = 1?
INTUBnTIF interrupt = 1?
UBnTXE = 0 (UBnCTL0)
Transmission ended?
Clear transmit FIFO
END
Yes
Yes
Yes
User’s Manual U19601EJ2V0UD
: Transmission ended?
No
No
No
Note 2
Write transmit FIFO
To continue data transmission, clear the
Note 3
: Writing to transmit FIFO enabled?
: Disable transmission
: Transmission ended?
: Writing all transmit data ended?

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