UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 444

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UPD70F3786GJ-GAE-AX

Manufacturer Part Number
UPD70F3786GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3-E 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Er
Datasheet

Specifications of UPD70F3786GJ-GAE-AX

Core Processor
RISC
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
100
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
124K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3786GJ-GAE-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
UPD70F3786GJ-GAE-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
8.5.7
time the valid edge input to the TIABnm pin has been detected, the count value of the 16-bit counter is stored in the
TABnCCRm register, and the 16-bit counter is cleared to 0000H.
request signal (INTTABnCCm) occurs.
unused pins by using the TABnIOC1 register.
clock is fixed to the TIAB00 pin. At this time, clear the TAB0IOC1.TAB0IS1 and TAB0IOC1.TAB0IS0 bits to 00 (capture
trigger input (TIAB00 pin): No edge detected).
TIAB10 to TIAB13 pins.
442
In the pulse width measurement mode, TABn starts counting when the TABnCTL0.TABnCE bit is set to 1. Each
The interval of the valid edge can be measured by reading the TABnCCRm register after a capture interrupt
Select one of the TIABn0 to TIABn3 pins as the capture trigger input pin. Specify “No edge detected” for the
When an external clock is used as the count clock, measure the pulse width of the TIAB0k pin because the external
For TAB1, the external clock is input from the EVTAB1 pin, and the pulse width can be measured by using the
Remark
(capture trigger input)
(capture trigger input)
(capture trigger input)
capture trigger input)
Pulse width measurement mode (TABnMD2 to TABnMD0 bits = 110)
count input
TIABn3 pin
(external event
Notes 1. TAB1: EVTAB1 pin
Remark
TIAB00 pin
TIABn1 pin
TIABn2 pin
m = 0 to 3,
n = 0, 1
k = 1 to 3
Note 1
Note 2
Internal count clock
2. The V850ES/JH3-E only includes the TIAB13 pin; it is not provided with the TIAB03 pin.
/
When using the V850ES/JH3-E, the TAB0CCR3 register and the INTTAB0CCR3 signal
cannot be used.
n = 0, 1
Figure 8-34. Configuration in Pulse Width Measurement Mode
detector
detector
detector
detector
detector
CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
Edge
Edge
Edge
Edge
Edge
selection
TABnCE
Count
clock
bit
User’s Manual U19601EJ2V0UD
TABnCCR0
(capture)
register
TABnCCR1
(capture)
register
TABnCCR2
(capture)
register
16-bit counter
TABnCCR3
(capture)
register
Clear
Note 2
INTTABnOV signal
INTTABnCC0 signal
INTTABnCC1 signal
INTTABnCC2 signal
INTTABnCC3 signal
Note 2

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