UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 974

• Manufacturer Part Number: UPD70F3786GJ-GAE-AX
• Description: MCU 32BIT V850ES/JX3-E 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Er

Specifications of UPD70F3786GJ-GAE-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 100
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 124K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

20.6.1 Start condition
The start condition for the SCL0n and SDA0n pins is a signal that the master device outputs to the slave device when
starting a serial transfer. The slave device can detect the start condition.
bit = 1). When a start condition is detected, the IICSn.STDn bit is set (1).
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A start condition is met when the SCL0n pin is high level and the SDA0n pin changes from high level to low level.
A start condition is output when the IICCn.STTn bit is set (1) after a stop condition has been detected (IICSn.SPDn
Caution When the IICCn.IICEn bit of the V850ES/JH3-E and V850ES/JJ3-E is set to 1 while other devices
Remark
are communicating, the start condition may be detected depending on the status of the
communication line. Be sure to set the IICCn.IICEn bit to 1 when the SCL0n and SDA0n lines are
high level.
n = 0 to 3 (V850ES/JH3-E)
n = 0 to 4 (V850ES/JJ3-E)
SDA0n
SCL0n
Figure 20-9. Start Condition
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User’s Manual U19601EJ2V0UD
CHAPTER 20 I
2
C BUS