UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 492

• Manufacturer Part Number: UPD70F3786GJ-GAE-AX
• Description: MCU 32BIT V850ES/JX3-E 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Er

Specifications of UPD70F3786GJ-GAE-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 100
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 124K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

490
(d) TMT0 counter read buffer register (TT0CNT)
(e) TMT0 capture/compare register 0 (TT0CCR0)
(f) TMT0 capture/compare register 1 (TT0CCR1)
By reading the TT0CNT register, the count value of the 16-bit counter can be read.
If the TT0CCR0 register is set to D
Interval = (D
The TT0CCR1 register is not used in the interval timer mode. However, the set value of the TT0CCR1
register is transferred to the CCR1 buffer register. When the count value of the 16-bit counter matches
the value of the CCR1 buffer register, the TOT01 pin output is inverted and a compare match interrupt
request signal (INTTT0CC1) is generated.
By setting this register to the same value as the value set in the TT0CCR0 register, a square wave can
be output from the TOT01 pin.
When the TT0CCR1 register is not used, it is recommended to set its value to FFFFH. Also mask the
register by the interrupt mask flag (TT0CCIC1.TT0CCMK1).
Remark
TMT0 control register 2 (TT0CTL2), TMT0 I/O control register 1 (TT0IOC1), TMT0 I/O control
register 2 (TT0IOC2), TMT0 I/O control register 3 (TT0IOC3), TMT0 option register 0
(TT0OPT0), TMT0 option register 1 (TT0OPT1), and TMT0 counter write register (TT0TCW)
are not used in the interval timer mode.
Figure 9-9. Register Setting for Interval Timer Mode Operation (2/2)
0
+ 1) × Count clock cycle
CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
User’s Manual U19601EJ2V0UD
0
, the interval is as follows.