mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 127

• Manufacturer Part Number: mcf51ac256a
• Description: Mcf51ac Flexis
• Manufacturer: Freescale Semiconductor, Inc

6.5.8.5
6.5.9
Port J is an 8-bit input/output port and shares its pins with the VBUS peripheral. On reset the pins will
default to the input state and under the I/O control. Enabling any of the shared peripherals will take priority
control over the pins. See
Port J is controlled by the registers listed below.
Freescale Semiconductor
Reset:
PTHDSn
PTHSEn
Field
Field
•
•
•
•
•
•
•
•
6–0
6–0
W
R
PTJ0 shares its pin with PST0.
PTJ1 shares its pin with PST1.
PTJ2 shares its pin with PST2.
PTJ3 shares its pin with PST3.
PTJ4 shares its pin with DDATA0.
PTJ5 shares its pin with DDATA1.
PTJ6 shares its pin with DDATA2.
PTJ7 shares its pin with DDATA3.
Port J Registers
Output Slew Rate Enable for Port H Bits — Each of these control bits determines if the output slew rate control
is enabled for the associated PTH pin. For port H pins that are configured as inputs, these bits have no effect.
0 Output slew rate control disabled for port H bit n.
1 Output slew rate control enabled for port H bit n.
Output Drive Strength Selection for Port H Bits — Each of these control bits selects between low and high
output drive for the associated PTH pin. For port H pins that are configured as inputs, these bits have no effect.
0 Low output drive strength selected for port H bit n.
1 High output drive strength selected for port H bit n.
Port H Drive Strength Selection Register (PTHDS)
0
0
7
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
Figure 6-41. Drive Strength Selection for Port H Register (PTHDS)
PTHDS6
0
6
Table 2-1
Table 6-39. PTHSE Register Field Descriptions
Table 6-40. PTHDS Register Field Descriptions
PTHDS5
for details on pin function priorities.
0
5
PTHDS4
0
4
Description
Description
PTHDS3
3
0
PTHDS2
0
2
Parallel Input/Output Control
PTHDS1
0
1
PTHDS0
0
0
6-23