mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 287

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mcf51ac256a

Manufacturer Part Number
mcf51ac256a
Description
Mcf51ac Flexis
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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12.4.3
General calls can be requested in 7-bit address or 10-bit address. If the GCAEN bit is set, the IIC matches
the general call address as well as its own slave address. When the IIC responds to a general call, it acts as
a slave-receiver and the IAAS bit is set after the address cycle. Software must read the IICD register after
the first byte transfer to determine whether the address matches is its own slave address or a general call.
If the value is 00, the match is a general call. If the GCAEN bit is clear, the IIC ignores any data supplied
from a general call address by not issuing an acknowledgement.
12.5
The IIC is disabled after reset. The IIC cannot cause an MCU reset.
12.6
The IIC generates a single interrupt.
An interrupt from the IIC is generated when any of the events in
is set. The interrupt is driven by bit IICIF (of the IIC status register) and masked with bit IICIE (of the IIC
control register). The IICIF bit must be cleared by software by writing a 1 to it in the interrupt routine. You
can determine the interrupt type by reading the status register.
12.6.1
The TCF (transfer complete flag) bit is set at the falling edge of the ninth clock to indicate the completion
of byte transfer.
12.6.2
When the calling address matches the programmed slave address (IIC address register) or when the
GCAEN bit is set and a general call is received, the IAAS bit in the status register is set. The CPU is
interrupted, provided the IICIE is set. The CPU must check the SRW bit and set its Tx mode accordingly.
12.6.3
The IIC is a true multi-master bus that allows more than one master to be connected on it. If two or more
masters try to control the bus at the same time, the relative priority of the contending masters is determined
by a data arbitration procedure. The IIC module asserts this interrupt when it loses the data arbitration
process and the ARBL bit in the status register is set.
Freescale Semiconductor
Resets
Interrupts
General Call Address
Byte Transfer Interrupt
Address Detect Interrupt
Arbitration Lost Interrupt
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
Match of received calling address
Complete 1-byte transfer
Interrupt Source
Arbitration Lost
Table 12-11. Interrupt Summary
Status
ARBL
IAAS
TCF
Table 12-11
IICIF
IICIF
IICIF
Flag
Local Enable
occur, provided the IICIE bit
IICIE
IICIE
IICIE
Inter-Integrated Circuit (IICV2)
12-15

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