mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 69

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mcf51ac256a

Manufacturer Part Number
mcf51ac256a
Description
Mcf51ac Flexis
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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After launching the erase verify command, the FCCF flag in the FSTAT register will set after the operation
has completed. The number of bus cycles required to execute the erase verify operation is equal to the
number of addresses in the flash array memory plus several bus cycles as measured from the time the
FCBEF flag is cleared until the FCCF flag is set. Upon completion of the erase verify operation, the
FBLANK flag in the FSTAT register will be set if all addresses in the flash array memory are verified to
be erased. If any address in the flash array memory is not erased, the erase verify operation will terminate
and the FBLANK flag in the FSTAT register will remain clear.
Freescale Semiconductor
3. Clear the FCBEF flag in the FSTAT register by writing a 1 to FCBEF to launch the erase verify
command.
Erase Verify
Status
Clock Register
Written
Check
Bit Polling for
Command Completion
Check
Access Error and
Protection Violation
Check
Command
Buffer Empty Check
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
Read: FCDIV register
Figure 4-10. Example Erase Verify Command Flow
2.
3.
1.
yes
Write: FCMD register
Erase Verify Command 0x05
Write: FSTAT register
Clear FCBEF 0x80
FDIVLD
Write: Flash Block Address
and Dummy Data
START
Set?
Read: FSTAT register
Read: FSTAT register
FACCERR/FPVIOL
FBLANK
yes
yes
FCBEF
yes
no
FCCF
Set?
Set?
Set?
EXIT
Write: FCDIV register
Set?
no
Flash Block
Erased
no
yes
no
no
Write: FSTAT register
Clear FACCERR/FPVIOL 0x30
Note: FCDIV needs to
be set after each reset
EXIT
Flash Block
Not Erased
Memory
4-25

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