mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 47

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mcf51ac256a

Manufacturer Part Number
mcf51ac256a
Description
Mcf51ac Flexis
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Peripheral register addresses for the MCF51AC256 series microcontrollers are shifted 0x(FF)FF_8000
compared with the MC9S08AC128 devices. The address offsets between registers are maintained
compared to the MC9S08AC128 devices in order to maintain code compatibility.
The ColdFire interrupt controller module is mapped in the peripheral space and occupies a 64-byte space
at the upper end of memory. Accordingly, its address decode is defined as
0x(FF)FF_FFC0–0x(FF)FF_FFFF. This 64-byte space includes the program-visible interrupt controller
registers as well as the space used for interrupt acknowledge (IACK) cycles.
There is a nonvolatile register area consisting of a block of 16 bytes in flash memory at
0x(00)00_0400–0x(00)00_040F. Nonvolatile register locations include:
Because the nonvolatile register locations are flash memory, they must be erased and programmed like
other flash memory locations.
In
set them apart from the bit names to the right. Cells that are not associated with named bits are shaded. A
shaded cell with a 0 indicates this unused bit always reads as a 0. Shaded cells with dashes indicate unused
or reserved bit locations that could read as 1s or 0s. When writing to these bits, write a 0 unless otherwise
specified.
Recall that ColdFire has a big endian byte addressable memory architecture. The most significant byte of
each address is the lowest numbered as shown in
32-bit longwords) are referenced using an address pointing to the most significant (first) byte.
Freescale Semiconductor
Table
— NVPROT and NVOPT are loaded into working registers at reset
— An 8-byte backdoor comparison key that optionally allows a user to gain controlled access to
4-2,
Byte 0x(FF)FF_FFFC
Byte 0x(00)00_0000
Byte 0x(00)00_0004
secure memory
31
Table
Word 0x(00)00_0000
Word 0x(00)00_0004
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
4-3,
Word 0x(FF)FF_FFFC
24
Table 4-5
23
Figure 4-2. ColdFire Memory Organization
Byte 0x(FF)FF_FFFD
Byte 0x(00)00_0001
Byte 0x(00)00_0005
and
Longword 0x(00)00_0000
Longword 0x(00)00_0004
Table
Longword 0x(FF)FF_FFFC
16
4-6, the register names in column two are shown in bold to
Figure
15
Byte 0x(FF)FF_FFFE
Byte 0x(00)00_0002
Byte 0x(00)00_0006
4-2. Multi-byte operands (e.g., 16-bit words and
Word 0x(00)00_0002
Word 0x(00)00_0006
8
Word 0x(FF)FF_FFFE
7
Byte 0x(FF)FF_FFFF
Byte 0x(00)00_0003
Byte 0x(00)00_0007
0
Memory
4-3

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