mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 543

• Manufacturer Part Number: mcf51ac256a
• Description: Mcf51ac Flexis
• Manufacturer: Freescale Semiconductor, Inc

22.4.1.5.20 WRITE_MEM.sz, WRITE_MEM.sz_WS
Write data at the specified memory address. The reference address is transmitted as three 8-bit packets
(msb to lsb) immediately after the command packet. The access attributes are defined by BAAR[TT,TM].
The hardware forces low-order address bits to zeros for word and longword accesses to ensure these
accesses are on 0-modulo-size alignments. If the with-status option is specified, the core status byte
(XCSR_SB) contained in XCSR[31–24] is returned after the read data. XCSR_SB reflects the state after
the memory write was performed.
The examples show the WRITE_MEM.B{_WS}, WRITE_MEM.W{_WS}, and WRITE_MEM.L{_WS}
commands.
Freescale Semiconductor
Write memory at the specified address with status
Write memory at the specified address
host →
host →
host →
target
target
target
0x11
0x15
0x19
host →
host →
host →
target
target
target
0x10
0x14
0x18
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
Address[23-0]
Address[23-0]
Address[23-0]
host →
host →
host →
target
target
target
Address[23-0]
Address[23-0]
Address[23-0]
host → target
host → target
host → target
data[31–24]
data[15–8]
data[7–0]
Memory
Memory
Memory
WRITE_MEM.sz_WS
host →
host →
host →
target
target
target
WRITE_MEM.sz
data[31–24]
data[15–8]
data[7–0]
Memory
Memory
Memory
host →
host →
host →
target
target
target
D
Y
L
data[23–16]
data[7–0]
Memory
Memory
host →
host →
target
target
XCSR_SB
target →
host
D
L
Y
data[23–16]
data[7–0]
Memory
Memory
host →
host →
target
target
D
Y
L
data[15–8]
Memory
host →
target
XCSR_SB
target →
host
D
L
Y
data[15–8]
Version 1 ColdFire Debug (CF1_DEBUG)
Memory
host →
target
Non-intrusive
data[7–0]
Memory
Non-intrusive
host →
target
data[7–0]
Memory
host →
target
D
L
Y
XCSR_SB
target →
host
D
Y
L
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