mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 191

• Manufacturer Part Number: mcf51ac256a
• Description: Mcf51ac Flexis
• Manufacturer: Freescale Semiconductor, Inc

capacitor is charging. The input is sampled for 3.5 cycles of the ADCK source when ADLSMP is low, or
23.5 cycles when ADLSMP is high.
For minimal loss of accuracy due to current injection, pins adjacent to the analog input pins should not be
transitioning during conversions.
9.6.2
Several sources of error exist for A/D conversions. These are discussed in the following sections.
9.6.2.1
For proper conversions, the input must be sampled long enough to achieve the proper accuracy. Given the
maximum input resistance of approximately 7kΩ and input capacitance of approximately 5.5 pF, sampling
to within 1/4
8 MHz maximum ADCK frequency) provided the resistance of the external analog source (R
below 2 kΩ.
Higher source resistances or higher-accuracy sampling is possible by setting ADLSMP (to increase the
sample window to 23.5 cycles) or decreasing ADCK frequency to increase sample time.
9.6.2.2
Leakage on the I/O pins can cause conversion error if the external analog source resistance (R
If this error cannot be tolerated by the application, keep R
1/4
9.6.2.3
System noise that occurs during the sample or conversion process can affect the accuracy of the
conversion. The ADC accuracy numbers are guaranteed as specified only if the following conditions are
met:
Freescale Semiconductor
LSB
•
•
•
•
•
•
leakage error (N = 8 in 8-bit, 10 in 10-bit or 12 in 12-bit mode).
There is a 0.1 μF low-ESR capacitor from V
There is a 0.1 μF low-ESR capacitor from V
If inductive isolation is used from the primary supply, an additional 1 μF capacitor is placed from
V
V
Operate the MCU in wait or stop3 mode before initiating (hardware triggered conversions) or
immediately after initiating (hardware or software triggered conversions) the ADC conversion.
— For software triggered conversions, immediately follow the write to ADCSC1 with a wait
— For stop3 mode operation, select ADACK as the clock source. Operation in stop3 reduces V
There is no I/O switching, input or output, on the MCU during the conversion.
DDA
SSA
instruction or stop instruction.
noise but increases effective conversion time due to stop recovery.
Sources of Error
LSB
Sampling Error
Pin Leakage Error
Noise-Induced Errors
(and V
to V
(at 12-bit resolution) can be achieved within the minimum sample window (3.5 cycles @
SSA
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
REFL
.
, if connected) is connected to V
REFH
DDA
to V
AS
SS
to V
at a quiet point in the ground plane.
lower than V
SSA
REFL
.
.
Analog-to-Digital Converter (S08ADC12V1)
DDA
/ (2
N
*I
LEAK
) for less than
AS
AS
) is kept
) is high.
9-25
DD