mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 562

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mcf51ac256a

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mcf51ac256a
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Mcf51ac Flexis
Manufacturer
Freescale Semiconductor, Inc
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Version 1 ColdFire Debug (CF1_DEBUG)
22.4.4.4.2
The supervisor instruction set has complete access to the user mode instructions plus the opcodes shown
below. The PST/DDATA specification for these opcodes is shown in
The move-to-SR, STLDSR, and RTE instructions include an optional PST = 0x3 value, indicating an entry
into user mode.
Similar to the exception processing mode, the stopped state (PST = 0x1E) and the halted state
(PST = 0x1F) display this status for two entries when the ColdFire processor enters the given mode.
22.4.5
Typically, a relatively simple interface pod is used to translate commands from a host computer into
commands for the custom serial interface to the single-wire background debug system. Depending on the
development tool vendor, this interface pod may use a standard RS-232 serial port, a parallel printer port,
or some other type of communications such as a universal serial bus (USB) to communicate between the
host PC and the pod. The pod typically connects to the target system with ground, the BKGD pin, RESET,
and sometimes V
useful to regain control of a lost target system or to control startup of a target system before the on-chip
nonvolatile memory has been programmed. Sometimes V
from the target system to avoid the need for a separate power supply. However, if the pod is powered
separately, it can be connected to a running target system without forcing a target system reset or otherwise
disturbing the running application program.
22-70
2
halt
move.l
move.l
move.w
move.w
movec.l
rte
stldsr.w
stop
wdebug.l
Instruction
For JMP and JSR instructions, the optional target instruction address is displayed only for those effective address
fields defining variant addressing modes. This includes the following <ea>x values: (An), (d16,An), (d8,An,Xi),
(d8,PC,Xi).
Freescale-Recommended BDM Pinout
Supervisor Instruction Set
Table 22-29. PST/DDATA Specification for Supervisor-Mode Instructions
DD
Ay,USP
USP,Ax
SR,Dx
{Dy,#<data>},SR
Ry,Rc
#imm
#<data>
<ea>y
Operand Syntax
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
. An open-drain connection to reset allows the host to force a target system reset,
PST = 0x1F,
PST = 0x1F
PST = 0x01
PST = 0x01
PST = 0x01
PST = 0x01, {PST = 0x03}
PST = 0x01
PST = 0x07, {PST = 0x0B, DD = source operand}, {PST = 0x03}, {PST = 0x0B,
PST = 0x05, {PST = 0x0[DE], DD = target address}
PST = 0x01, {PST = 0x0B, DD = destination operand, PST = 0x03}
PST = 0x1E,
PST = 0x1E
PST = 0x01, {PST = 0x0B, DD = source, PST = 0x0B, DD = source}
DD = source operand},
DD
can be used to allow the pod to use power
PST/DDATA
Table
22-29.
Freescale Semiconductor

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