mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 142

• Manufacturer Part Number: mcf51ac256a
• Description: Mcf51ac Flexis
• Manufacturer: Freescale Semiconductor, Inc

ColdFire Core
All ColdFire processors inhibit interrupt sampling during the first instruction of all exception handlers.
This allows any handler to disable interrupts effectively, if necessary, by raising the interrupt mask level
contained in the status register. In addition, the ISA_C architecture includes an instruction (STLDSR) that
stores the current interrupt mask level and loads a value into the SR. This instruction is specifically
intended for use as the first instruction of an interrupt service routine that services multiple interrupt
requests with different interrupt levels. Finally, the V1 ColdFire core includes the CPUCR[IME] bit that
forces the processor to automatically raise the mask level to 7 during the interrupt exception, removing the
need for any explicit instruction in the service routine to perform this function. For more details, see
ColdFire Family Programmer’s Reference Manual.
7.3.2.1
Figure 7-10
and the 16-bit status register, and the second longword contains the 32-bit program counter address.
The 16-bit format/vector word contains three unique fields:
7-12
SSP
+ 0x4
→
shows exception stack frame. The first longword contains the 16-bit format/vector word (F/V)
31 30 29 28 27
Exception Stack Frame Definition
Format
1
Fault refers to the PC of the instruction that caused the exception. Next refers to the PC
of the instruction that follows the instruction that caused the fault.
Number(s)
103–255
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
64–102
Vector
15–23
25–31
32–47
48–60
62–63
10
11
12
13
14
24
61
9
FS[3:2]
Table 7-6. Exception Vector Assignments (continued)
26 25 24 23 22 21 20 19 18 17
Figure 7-10. Exception Stack Frame Form
0x03C–0x05C
0x080–0x0BC
0x0F8–0x0FC
0x19C–0x3FC
0x064–0x07C
0x0C0–0x0F0
0x100–0x198
Offset (Hex)
Vector
0x02C
0x024
0x028
0x030
0x034
0x038
0x060
0x0F4
Vector
Program
Stacked
Counter
Program Counter
Fault
Fault
Fault
Fault
Next
Next
Next
Next
Next
FS[1:0]
—
—
—
—
—
—
16 15 14 13 12 11 10 9
Unimplemented line-A opcode
Unimplemented line-F opcode
Device-specific interrupts
Unsupported instruction
Trap # 0-15 instructions
Spurious interrupt
Debug interrupt
Assignment
Format error
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Trace
Status Register
8
7
6
Freescale Semiconductor
5
4
3
2
1
0