mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 44

• Manufacturer Part Number: mcf51ac256a
• Description: Mcf51ac Flexis
• Manufacturer: Freescale Semiconductor, Inc

Modes of Operation
3.9
The debug interface is used to program a bootloader or user application program into the flash program
memory before the MCU is operated in run mode for the first time. When a MCF51AC256 series MCUs
are shipped from the Freescale Semiconductor factory, the flash program memory is erased by default
unless specifically noted, so there is no program that could be executed in run mode until the flash memory
is initially programmed. The debug interface can also be used to erase and reprogram the flash memory
after it has been previously programmed.
For additional information about the debug interface, refer to
(CF1_DEBUG).”
3-8
Debug Mode
1
2
3
4
Voltage Regulator / PMC
LP mode for the ADC is invoked by setting ADLPC = 1. ADACK is selected via the
ADCCFG[ADICLK] field in the ADC. See
for details.
LVD must be enabled to run in stop if converting the bandgap channel.
The PTA5/IRQ/TPM1CLK/RESET pin has a direct connection to the on-chip regulator wakeup
input. Asserting a low on this pin while in stop2 will trigger the PMC to wake. As a result, the
device will undergo a power-on-reset sequence.
BLPE refers to the MCG “Bypassed Low Power External” state. See
Clock Generator
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
GPI/O Pins
Peripheral
MSCAN
TPM3
MCG
SCIx
SPIx
RTI
Table 3-3. Low Power Mode Behavior (continued)
(MCGV3),” for more details.
States Held
Regulation,
1 kHz osc if
LPOCLK if
Shutdown.
(Wake Up
via POR)
enabled
enabled
STOP2
Partial
Soft
Off
Off
Off
Off
Off
Chapter 9, “Analog-to-Digital Converter (ADC12V1),”
STOP or BLPE
Soft Regulation.
LPOCLK or
1 kHz osc if
ICSERCLK
SoftNoClk
SoftNoClk
SoftNoClk
SoftNoClk
SoftNoClk
(Wakeup)
(Wakeup)
(Wakeup)
enabled
STOP3
SoftOn
4
Mode
Chapter 22, “Version 1 ColdFire Debug
ICSERCLK or
STOP or any
1 kHz osc on
Regulation
Regulation
ICSIRCLK
FullNoClk
(Wakeup)
FullNoClk
(Wakeup)
FullNoClk
FullNoClk
FullNoClk
LPOCLK,
STOP4
mode
only
Full
Full
Chapter 16, “Multipurpose
1 kHz osc on
Any mode
FullOn
FullOn
FullOn
FullOn
FullOn
FullOn
FullOn
WAIT
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